Selective epitaxy process with alternating gas supply

ABSTRACT

In one example, a method of epitaxially forming a silicon-containing material on a substrate surface is presented which includes positioning a substrate into a process chamber. The substrate has a monocrystalline surface and at least a second surface, such as an amorphous surface and/or a polycrystalline surface. The substrate is exposed to a deposition gas to deposit an epitaxial layer on the monocrystalline surface and a polycrystalline layer on the second surface. The deposition gas preferably contains a silicon source and at least a second elemental source, such as a germanium source, a carbon source and/or combinations thereof. Thereafter, the method further provides exposing the substrate to an etchant gas to etch the polycrystalline layer and the epitaxial layer in a manner such that the polycrystalline layer is etched at a faster rate than the epitaxial layer. The method may further include a deposition cycle that includes repeating the exposure of the substrate to the deposition and etchant gases to form a silicon-containing material with a predetermined thickness.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a divisional application of U.S. patent applicationSer. No. 11/001,774, filed Dec. 1, 2004, now U.S. Pat. No. 7,312,128,which is incorporated by reference herein.

BACKGROUND OF THE INVENTION

1. Field of the Invention

Embodiments of the invention generally relate to the field of electronicmanufacturing processes and devices, more particular, to methods ofdepositing silicon-containing films while forming electronic devices.

2. Description of the Related Art

As smaller transistors are manufactured, ultra shallow source/drainjunctions are becoming more challenging to produce. Generally, sub-100nm CMOS (complementary metal-oxide semiconductor) devices require ajunction depth to be less than 30 nm. Selective epitaxial deposition isoften utilized to form epilayers of silicon-containing materials (e.g.,Si, SiGe and SiC) into the junctions. Generally, selective epitaxialdeposition permits growth of epilayers on silicon moats with no growthon dielectric areas. Selective epitaxy can be used within semiconductordevices, such as elevated source/drains, source/drain extensions,contact plugs or base layer deposition of bipolar devices.

Generally, a selective epitaxy process involves a deposition reactionand an etch reaction. The deposition and etch reactions occursimultaneously with relatively different reaction rates to an epitaxiallayer and to a polycrystalline layer. During the deposition process, theepitaxial layer is formed on a monocrystalline surface while apolycrystalline layer is deposited on at least a second layer, such asan existing polycrystalline layer and/or an amorphous layer. However,the deposited polycrystalline layer is generally etched at a faster ratethan the epitaxial layer. Therefore, by changing the concentration of anetchant gas, the net selective process results in deposition of epitaxymaterial and limited, or no, deposition of polycrystalline material. Forexample, a selective epitaxy process may result in the formation of anepilayer of silicon-containing material on a monocrystalline siliconsurface while no deposition is left on the spacer.

Selective epitaxy deposition of silicon-containing materials has becomea useful technique during formation of elevated source/drain andsource/drain extension features, for example, during the formation ofsilicon-containing MOSFET (metal oxide semiconductor field effecttransistor) devices. Source/drain extension features are manufactured byetching a silicon surface to make a recessed source/drain feature andsubsequently filling the etched surface with a selectively grownepilayers, such as a silicon germanium (SiGe) material. Selectiveepitaxy permits near complete dopant activation with in-situ doping, sothat the post annealing process is omitted. Therefore, junction depthcan be defined accurately by silicon etching and selective epitaxy. Onthe other hand, the ultra shallow source/drain junction inevitablyresults in increased series resistance. Also, junction consumptionduring silicide formation increases the series resistance even further.In order to compensate for junction consumption, an elevatedsource/drain is epitaxially and selectively grown on the junction.Typically, the elevated source/drain layer is undoped silicon.

However, current selective epitaxy processes have some drawbacks. Inorder to maintain selectivity during present epitaxy processes, chemicalconcentrations of the precursors, as well as reaction temperatures mustbe regulated and adjusted throughout the deposition process. If notenough silicon precursor is administered, then the etching reaction maydominate and the overall process is slowed down. Also, harmful overetching of substrate features may occur. If not enough etchant precursoris administered, then the deposition reaction may dominate reducing theselectivity to form monocrystalline and polycrystalline materials acrossthe substrate surface. Also, current selective epitaxy processes usuallyrequire a high reaction temperature, such as about 800° C., 1,000° C. orhigher. Such high temperatures are not desirable during a fabricationprocess due to thermal budget considerations and possible uncontrollednitridation reactions to the substrate surface.

Therefore, there is a need to have a process for selectively andepitaxially depositing silicon and silicon-containing compounds withoptional dopants. Furthermore, the process should be versatile to formsilicon-containing compounds with varied elemental concentrations whilehaving a fast deposition rate and maintaining a process temperature,such as about 800° C. or less.

SUMMARY OF THE INVENTION

In one example, a method of epitaxially forming a silicon-containingmaterial on a substrate surface is presented which includes positioningin a process chamber a substrate containing a monocrystalline surfaceand at least a second surface, such as an amorphous surface and/or apolycrystalline surface. The substrate is exposed to a deposition gas todeposit an epitaxial layer on the monocrystalline surface and apolycrystalline layer on the second surface. The deposition gaspreferably contains a silicon source and at least a second elementalsource, such as a germanium source, a carbon source and/or combinationsthereof. Thereafter, the method further provides exposing the substrateto an etchant gas to etch the polycrystalline layer and the epitaxiallayer in a manner such that the polycrystalline layer is etched at afaster rate than the epitaxial layer. The method may further include adeposition cycle that includes repeating the exposure of the substrateto the deposition and etchant gases to form the silicon-containingmaterial with a predetermined thickness.

In another example, a method of epitaxially forming a silicon-containingmaterial on a substrate surface is presented which includes positioningin a process chamber a substrate containing a monocrystalline surfaceand at least a second surface, such as an amorphous surface and/or apolycrystalline surface. The substrate is exposed to a deposition gas todeposit an epitaxial layer on the monocrystalline surface and apolycrystalline layer on the second surface. Thereafter, the methodfurther provides exposing the substrate to an etchant gas containingchlorine gas and etching the polycrystalline layer and the epitaxiallayer in a manner such that the polycrystalline layer is etched at afaster rate than the epitaxial layer.

In another example, a method of epitaxially forming a silicon-containingmaterial on a substrate surface is presented which includes positioningin a process chamber a substrate containing a monocrystalline surfaceand at least a second surface, such as an amorphous surface and/or apolycrystalline surface. The process chamber is heated to a temperaturein a range from about 500° C. to about 750° C. The substrate is exposedto a deposition gas to deposit an epitaxial layer on the monocrystallinesurface and a polycrystalline layer on the second surface. Thedeposition gas contains a silicon source and an inert carrier gas fordepositing an epitaxial layer on the monocrystalline surface and apolycrystalline layer on the second surface. Thereafter, the methodfurther provides exposing the substrate to an etchant gas comprising anetchant and the inert carrier gas and etching the polycrystalline layerand the epitaxial layer in a manner such that the polycrystalline layeris etched at a faster rate than the epitaxial layer.

In another example, a method of epitaxially forming a silicon-containingmaterial on a substrate surface is presented which includes positioningin a process chamber a substrate containing a monocrystalline surfaceand at least a second surface, such as an amorphous surface and/or apolycrystalline surface. The substrate is exposed to a deposition gas todeposit an epitaxial layer on the monocrystalline surface and apolycrystalline layer on the second surface. The deposition gaspreferably contains a silicon source and a dopant compound containing anelemental source of boron, arsenic, phosphorus, aluminum, gallium,germanium, carbon and/or combinations thereof. Thereafter, the methodfurther provides exposing the substrate to an etchant gas to etch thepolycrystalline layer and the epitaxial layer in a manner such that thepolycrystalline layer is etched at a faster rate than the epitaxiallayer.

In another example, a method of epitaxially forming a silicon-containingmaterial on a substrate surface is presented which includes positioningin a process chamber a substrate containing a monocrystalline surfaceand at least a second surface, such as an amorphous surface and/or apolycrystalline surface. The substrate is exposed to a deposition gas todeposit an epitaxial layer on the monocrystalline surface and apolycrystalline layer on the second surface. The method further includesexposing the substrate to a second deposition gas to deposit a secondepitaxial layer on the first epitaxial layer and a secondpolycrystalline layer on the first polycrystalline layer. The seconddeposition gas may comprise an elemental source of boron, arsenic,phosphorus, aluminum, gallium, germanium, carbon and/or combinationsthereof. Thereafter, the method further provides exposing the substrateto an etchant gas to etch the first and second polycrystalline layersand the first and second epitaxial layers in a manner such that thefirst and second polycrystalline layer are etched at faster rates thanthe first and second epitaxial layers. The method may further include adeposition cycle that includes repeating the exposure of the substrateto the deposition and etchant gases to form the silicon-containingmaterial with a predetermined thickness.

BRIEF DESCRIPTION OF THE DRAWINGS

So that the manner in which the above recited features of the presentinvention can be understood in detail, a more particular description ofthe invention, briefly summarized above, may be had by reference toembodiments, some of which are illustrated in the appended drawings. Itis to be noted, however, that the appended drawings illustrate onlytypical embodiments of this invention and are therefore not to beconsidered limiting of its scope, for the invention may admit to otherequally effective embodiments.

FIG. 1 is a flow chart describing a process to selectively andepitaxially deposit silicon-containing materials in one embodimentdescribed herein;

FIGS. 2A-2E show schematic illustrations of fabrication techniques for asource/drain extension device within a MOSFET;

FIGS. 3A-C show several devices containing selectively and epitaxiallydeposited silicon-containing layers by applying embodiments describedherein; and

FIG. 4 is a flow chart describing a process to selectively andepitaxially deposit silicon-containing materials in another embodimentdescribed herein.

DETAILED DESCRIPTION

Embodiments of the invention generally provide processes to selectivelyand epitaxially deposit silicon-containing materials on monocrystallinesurfaces of a substrate during fabrication of electronic devices. Apatterned substrate containing a monocrystalline surface (e.g., siliconor silicon germanium) and at least a secondary surface, such as anamorphous surface and/or a polycrystalline surface (e.g., oxide ornitride), is exposed to an epitaxial process to form an epitaxial layeron the monocrystalline surface while forming limited or nopolycrystalline layer on the secondary surfaces. The epitaxial process,also referred to as the alternating gas supply (AGS) process, includesrepeating a cycle of a deposition process and an etching process untilthe desired thickness of an epitaxial layer is grown.

The deposition process includes exposing the substrate surface to adeposition gas containing at least a silicon source and a carrier gas.The deposition gas may also include a germanium source or carbon source,as well as a dopant source. During the deposition process, an epitaxiallayer is formed on the monocrystalline surface of the substrate while apolycrystalline layer is formed on secondary surfaces, such as amorphousand/or polycrystalline surfaces. Subsequently, the substrate is exposedto an etching gas. The etching gas includes a carrier gas and anetchant, such as chlorine gas or hydrogen chloride. The etching gasremoves silicon-containing materials deposited during the depositionprocess. During the etching process, the polycrystalline layer isremoved at a faster rate than the epitaxial layer. Therefore, the netresult of the deposition and etching processes forms epitaxially grownsilicon-containing material on monocrystalline surfaces while minimizinggrowth, if any, of polycrystalline silicon-containing material on thesecondary surfaces. A cycle of the deposition and etching processes maybe repeated as needed to obtain the desired thickness ofsilicon-containing materials. The silicon-containing materials which canbe deposited by embodiments of the invention include silicon, silicongermanium, silicon carbon, silicon germanium carbon, and dopant variantsthereof.

In one example of the AGS process, use of chlorine gas as an etchantlowers the overall process temperature below about 800° C. In general,deposition processes may be conducted at lower temperatures than etchingreactions, since etchants often need a high temperature to be activated.For example, silane may be thermally decomposed to deposit silicon atabout 500° C. or less, while hydrogen chloride requires an activationtemperature of about 700° C. or higher to act as an effective etchant.Therefore, if hydrogen chloride is used during an AGS process, theoverall process temperature is dictated by the higher temperaturerequired to activate the etchant. Chlorine contributes to the overallAGS process by reducing the required overall process temperature.Chlorine may be activated at a temperature as low as about 500° C.Therefore, by incorporating chlorine into the AGS process as theetchant, the overall AGS process temperature may be significantlyreduced, such as by 200° C. to 300° C., over processes which usehydrogen chloride as the etchant. Also, chlorine etchessilicon-containing materials faster than hydrogen chloride. Therefore,chlorine etchants increase the overall rate of the AGS process.

In another example of the AGS process, an inert gas, such as nitrogen,is used as a carrier gas during the deposition and etching processes,instead of a traditional carrier gas, such as hydrogen. The use of aninert carrier gas has several attributes during an AGS process. For one,an inert carrier gas may increase the deposition rate of thesilicon-containing material. While hydrogen may be used as a carriergas, during the deposition process, hydrogen has a tendency to adsorb orreact to the substrate to form hydrogen-terminated surfaces. Ahydrogen-terminated surface reacts much slower to epitaxial growth thana bare silicon surface. Therefore, the use of an inert carrier gasincreases the deposition rate by not adversely effecting the depositionreaction.

Although noble gasses, such as argon or helium, may be used as an inertcarrier gas, nitrogen is the economically preferred inert carrier gas.Nitrogen is generally much less expensive than hydrogen, argon orhelium. One drawback that may occur from using nitrogen as a carrier gasis the nitridizing of materials on a substrate during depositionprocesses. However, high temperature, such as over 800° C., is requiredto activate nitrogen in such a manner. Therefore, nitrogen isadvantageously used as an inert carrier gas in AGS processes conductedat temperatures below the nitrogen activation threshold. The combinedeffect of using chlorine as an etchant and nitrogen as a carrier gasgreatly increases the rate of the overall AGS process.

Throughout the application, the terms “silicon-containing” materials,compounds, films or layers should be construed to include a compositioncontaining at least silicon and may contain germanium, carbon, boron,arsenic, phosphorus gallium and/or aluminum. Other elements, such asmetals, halogens or hydrogen may be incorporated within asilicon-containing material, compound, film or layer, usually in partper million (ppm) concentrations. Compounds or alloys ofsilicon-containing materials may be represented by an abbreviation, suchas Si for silicon, SiGe, for silicon germanium, SiC for silicon carbonand SiGeC for silicon germanium carbon. The abbreviations do notrepresent chemical equations with stoichiometrical relationships, norrepresent any particular reduction/oxidation state of thesilicon-containing materials.

FIG. 1 illustrates an example of epitaxial process 100 used to deposit asilicon-containing layer. The process 100 includes step 110 for loadinga patterned substrate into a process chamber and adjusting theconditions within the process chamber to a desired temperature andpressure. Step 120 provides a deposition process to form an epitaxiallayer on a monocrystalline surface of the substrate while forming apolycrystalline layer on the amorphous and/or polycrystalline surfacesof the substrate. During step 130, the deposition process is terminated.Step 140 provides an etching process to etch the surface of thesubstrate. Preferably, the polycrystalline layer is etched at a fasterrate than the epitaxial layer. The etching step either minimizes orcompletely removes the polycrystalline layer while removing only amarginal portion of the epitaxial layer. During step 150, the etchingprocess is terminated. The thickness of the epitaxial layer and thepolycrystalline layer, if any, is determined during step 160. If thepredetermined thickness of the epitaxial layer or the polycrystallinelayer is achieved, then epitaxial process 100 is terminated at step 170.However, if the predetermined thickness is not achieved, then steps120-160 are repeated as a cycle until the predetermined thickness isachieved.

A patterned substrate is loaded in to a process chamber during step 110.Patterned substrates are substrates that include electronic featuresformed into or onto the substrate surface. The patterned substrateusually contains monocrystalline surfaces and at least one secondarysurface that is non-monocrystalline, such as polycrystalline oramorphous surfaces. Monocrystalline surfaces include the barecrystalline substrate or a deposited single crystal layer usually madefrom a material such as silicon, silicon germanium or silicon carbon.Polycrystalline or amorphous surfaces may include dielectric materials,such as oxides or nitrides, specifically silicon oxide or siliconnitride, as well as amorphous silicon surfaces.

Epitaxial process 100 begins by adjusting the process chamber containingthe patterned substrate to a predetermined temperature and pressureduring step 110. The temperature is tailored to the particular conductedprocess. Generally, the process chamber is maintained at a consistenttemperature throughout epitaxial process 100. However, some steps may beperformed at varying temperatures. The process chamber is kept at atemperature in the range from about 250° C. to about 1,000° C.,preferably from about 500° C. to about 800° C. and more preferably fromabout 550° C. to about 750° C. The appropriate temperature to conductepitaxial process 100 may depend on the particular precursors used todeposit and/or etch the silicon-containing materials during steps 120and 140. In one example, it has been found that chlorine (Cl₂) gas worksexceptionally well as an etchant for silicon-containing materials attemperatures lower than processes using more common etchants. Therefore,in one example, a preferred temperature to pre-heat the process chamberis about 750° C. or less, preferably about 650° C. or less and morepreferably about 550° C. or less. The process chamber is usuallymaintained at a pressure from about 0.1 Torr to about 200 Torr,preferably from about 1 Torr to about 50 Torr. The pressure mayfluctuate during and between process steps 110-160, but is generallymaintained constant.

The deposition process is conducted during step 120. The patternedsubstrate is exposed to a deposition gas to form an epitaxial layer onthe monocrystalline surface while forming a polycrystalline layer on thesecondary surfaces. The substrate is exposed to the deposition gas for aperiod of time of about 0.5 seconds to about 30 seconds, preferably fromabout 1 second to about 20 seconds, and more preferably from about 5seconds to about 10 seconds. The specific exposure time of thedeposition process is determined in relation to the exposure time duringthe etching process in step 140, as well as particular precursors andtemperature used in the process. Generally, the substrate is exposed tothe deposition gas long enough to form a maximized thickness of anepitaxial layer while forming a minimal thickness of a polycrystallinelayer that may be easily etched away during subsequent step 140.

The deposition gas contains at least a silicon source and a carrier gas,and may contain at least one secondary elemental source, such as agermanium source and/or a carbon source. Also, the deposition gas mayfurther include a dopant compound to provide a source of a dopant, suchas boron, arsenic, phosphorus, gallium and/or aluminum. In analternative embodiment, the deposition gas may include at least oneetchant, such as hydrogen chloride or chlorine.

The silicon source is usually provided into the process chamber at arate in a range from about 5 sccm to about 500 sccm, preferably fromabout 10 sccm to about 300 sccm, and more preferably from about 50 sccmto about 200 sccm, for example, about 100 sccm. Silicon sources usefulin the deposition gas to deposit silicon-containing compounds includesilanes, halogenated silanes and organosilanes. Silanes include silane(SiH₄) and higher silanes with the empirical formula Si_(x)H_((2x+2)),such as disilane (Si₂H₆), trisilane (Si₃H₈), and tetrasilane (Si₄H₁₀),as well as others. Halogenated silanes include compounds with theempirical formula X′_(y)Si_(x)H_((2x+2-y)), where X′═F, Cl, Br or I,such as hexachlorodisilane (Si₂Cl₆), tetrachlorosilane (SiCl₄),dichlorosilane (Cl₂SiH₂) and trichlorosilane (Cl₃SiH). Organosilanesinclude compounds with the empirical formula R_(y)Si_(x)H_((2x+2-y)),where R=methyl, ethyl, propyl or butyl, such as methylsilane((CH₃)SiH₃), dimethylsilane ((CH₃)₂SiH₂), ethylsilane ((CH₃CH₂)SiH₃),methyldisilane ((CH₃)Si₂H₅), dimethyidisilane ((CH₃)₂Si₂H₄) andhexamethyldisilane ((CH₃)₆Si₂). Organosilane compounds have been foundto be advantageous silicon sources as well as carbon sources inembodiments which incorporate carbon in the deposited silicon-containingcompound. The preferred silicon sources include silane, dichlorosilaneand disilane.

The silicon source is usually provided into the process chamber alongwith a carrier gas. The carrier gas has a flow rate from about 1 slm(standard liters per minute) to about 100 slm, preferably from about 5slm to about 75 slm, and more preferably from about 10 slm to about 50slm, for example, about 25 slm. Carrier gases may include nitrogen (N₂),hydrogen (H₂), argon, helium and combinations thereof. An inert carriergas is preferred and includes nitrogen, argon, helium and combinationsthereof. A carrier gas may be selected based on the precursor(s) usedand/or the process temperature during the epitaxial process 100. Usuallythe carrier gas is the same throughout each of the steps 110-150.However, some embodiments may use different carrier gases in particularsteps. For example, nitrogen may be used as a carrier gas with thesilicon source in step 120 and with the etchant in step 140,

Preferably, nitrogen is utilized as a carrier gas in embodimentsfeaturing low temperature (e.g., <800° C.) processes. Low temperatureprocesses are accessible due in part to the use of chlorine gas in theetching process further discussed in step 140. Nitrogen remains inertduring low temperature deposition processes. Therefore, nitrogen is notincorporated into the deposited silicon-containing material during lowtemperature processes. Also, a nitrogen carrier gas does not formhydrogen-terminated surfaces as does a hydrogen carrier gas. Thehydrogen-terminated surfaces formed by the adsorption of hydrogencarrier gas on the substrate surface inhibit the growth rate ofsilicon-containing layers. Finally, the low temperature processes maytake economic advantage of nitrogen as a carrier gas, since nitrogen isfar less expensive than hydrogen, argon or helium.

The deposition gas used during step 120 may also contain at least onesecondary elemental source, such as a germanium source and/or a carbonsource. The germanium source may be added to the process chamber withthe silicon source and carrier gas to form a silicon-containingcompound, such as a silicon germanium material. The germanium source isusually provided into the process chamber at a rate in the range fromabout 0.1 sccm to about 20 sccm, preferably from about 0.5 sccm to about10 sccm, and more preferably from about 1 sccm to about 5 sccm, forexample, about 2 sccm. Germanium sources useful to depositsilicon-containing compounds include germane (GeH₄), higher germanes andorganogermanes. Higher germanes include compounds with the empiricalformula Ge_(x)H_((2x+2)), such as digermane (Ge₂H₆), trigermane (Ge₃H₈)and tetragermane (Ge₄H₁₀), as well as others. Organogermanes includecompounds such as methylgermane ((CH₃)GeH₃), dimethylgermane((CH₃)₂GeH₂), ethylgermane ((CH₃CH₂)GeH₃), methyldigermane ((CH₃)Ge₂H₅),dimethyidigermane ((CH₃)₂Ge₂H₄) and hexamethyldigermane ((CH₃)₆Ge₂).Germanes and organogermane compounds have been found to be advantageousgermanium sources and carbon sources in embodiments while incorporatinggermanium and carbon into the deposited silicon-containing compounds,namely SiGe and SiGeC compounds. The germanium concentration in theepitaxial layer is in the range from about 1 at % to about 30 at %, forexample, about 20 at %. The germanium concentration may be graded withinan epitaxial layer, preferably graded with a higher germaniumconcentration in the lower portion of the epitaxial layer than in theupper portion of the epitaxial layer.

Alternatively, a carbon source may be added during step 120 to theprocess chamber with the silicon source and carrier gas to form asilicon-containing compound, such as a silicon carbon material. A carbonsource is usually provided into the process chamber at a rate in therange from about 0.1 sccm to about 20 sccm, preferably from about 0.5sccm to about 10 sccm, and more preferably from about 1 sccm to about 5sccm, for example, about 2 sccm. Carbon sources useful to depositsilicon-containing compounds include organosilanes, alkyls, alkenes andalkynes of ethyl, propyl and butyl. Such carbon sources includemethylsilane (CH₃SiH₃), dimethylsilane ((CH₃)₂SiH₂), ethylsilane(CH₃CH₂SiH₃), methane (CH₄), ethylene (C₂H₄), ethyne (C₂H₂), propane(C₃H₈), propene (C₃H₆), butyne (C₄H₆), as well as others. The carbonconcentration of an epitaxial layer is in the range from about 200 ppmto about 5 at %, preferably from about 1 at % to about 3 at %, forexample 1.5 at %. In one embodiment, the carbon concentration may begraded within an epitaxial layer, preferably graded with a higher carbonconcentration in the lower portion of the epitaxial layer than in theupper portion of the epitaxial layer. Alternatively, a germanium sourceand a carbon source may both be added during step 120 into the processchamber with the silicon source and carrier gas to form asilicon-containing compound, such as a silicon germanium carbonmaterial.

The deposition gas used during step 120 may further include at least onedopant compound to provide a source of elemental dopant, such as boron,arsenic, phosphorus, gallium or aluminum. Dopants provide the depositedsilicon-containing compounds with various conductive characteristics,such as directional electron flow in a controlled and desired pathwayrequired by the electronic device. Films of the silicon-containingcompounds are doped with particular dopants to achieve the desiredconductive characteristic. In one example, the silicon-containingcompound is doped p-type, such as by using diborane to add boron at aconcentration in the range from about 10¹⁵ atoms/cm³ to about 10²¹atoms/cm³. In one example, the p-type dopant has a concentration of atleast 5×10¹⁹ atoms/cm³. In another example, the p-type dopant is in therange from about 1×10²⁰ atoms/cm³ to about 2.5×10²¹ atoms/cm³. Inanother example, the silicon-containing compound is doped n-type, suchas with phosphorus and/or arsenic to a concentration in the range fromabout 10¹⁵ atoms/cm³ to about 10²¹ atoms/cm³.

A dopant source is usually provided into the process chamber during step120 at a rate in the range from about 0.1 sccm to about 20 sccm,preferably from about 0.5 sccm to about 10 sccm, and more preferablyfrom about 1 sccm to about 5 sccm, for example, about 2 sccm.Boron-containing dopants useful as a dopant source include boranes andorganoboranes. Boranes include borane, diborane (B₂H₆), triborane,tetraborane and pentaborane, while alkylboranes include compounds withthe empirical formula R_(x)BH_((3-x)), where R=methyl, ethyl, propyl orbutyl and x=1, 2 or 3. Alkylboranes include trimethylborane ((CH₃)₃B),dimethylborane ((CH₃)₂BH), triethylborane ((CH₃CH₂)₃B) and diethylborane((CH₃CH₂)₂BH). Dopants may also include arsine (AsH₃), phosphine (PH₃)and alkylphosphines, such as with the empirical formula R_(x)PH_((3-x)),where R=methyl, ethyl, propyl or butyl and x=1, 2 or 3. Alkylphosphinesinclude trimethylphosphine ((CH₃)₃P), dimethylphosphine ((CH₃)₂PH),triethylphosphine ((CH₃CH₂)₃P) and diethylphosphine ((CH₃CH₂)₂PH).Aluminum and gallium dopant sources may include alkylated and/orhalogenated derivates, such as described with the empirical formulaR_(x)MX_((3-x)), where M=Al or Ga, R=methyl, ethyl, propyl or butyl,X═Cl or F and x=0, 1, 2 or 3. Examples of aluminum and gallium dopantsources include trimethylaluminum (Me₃Al), triethylaluminum (Et₃Al),dimethylaluminumchloride (Me₂AlCl), aluminum chloride (AlCl₃),trimethylgallium (Me₃Ga), triethylgallium (Et₃Ga),dimethylgalliumchloride (Me₂GaCl) and gallium chloride (GaCl₃).

During step 130, the deposition process is terminated. In one example,the process chamber may be flushed with a purge gas or the carrier gasand/or the process chamber may be evacuated with a vacuum pump. Thepurging and/or evacuating processes remove excess deposition gas,reaction by-products and other contaminates. In another example, oncethe deposition process has terminated, the etching process in step 140is immediately started without purging and/or evacuating the processchamber.

The etching process in step 140 removes silicon-containing materialsdeposited during step 120 from the substrate surface. The etchingprocess removes both epitaxial or monocrystalline materials andamorphous or polycrystalline materials. Polycrystalline layers, if any,deposited on the substrate surface are removed at a faster rate than theepitaxial layers. The time duration of the etching process is balancedwith the time duration of the deposition process to result in netdeposition of the epitaxial layer selectively formed on desired areas ofthe substrate. Therefore, the net result of the deposition process instep 120 and etching process in step 140 is to form selective andepitaxially grown silicon-containing material while minimizing, if any,growth of polycrystalline silicon-containing material.

During step 140, the substrate is exposed to the etching gas for aperiod of time in the range from about 10 seconds to about 90 seconds,preferably, from about 20 seconds to about 60 seconds, and morepreferably from about 30 seconds to about 45 seconds. The etching gasincludes at least one etchant and a carrier gas. The etchant is usuallyprovided into the process chamber at a rate in the range from about 10sccm to about 700 sccm, preferably from about 50 sccm to about 500 sccm,and more preferably from about 100 sccm to about 400 sccm, for example,about 200 sccm. The etchant used in the etching gas may include chlorine(Cl₂), hydrogen chloride (HCl), boron trichloride (BCl₃), carbontetrachloride (CCl₄), chlorotrifluoride (ClF₃) and combinations thereof.Preferably, chlorine or hydrogen chloride is used as the etchant.

The etchant is usually provided into the process chamber with a carriergas. The carrier gas has a flow rate in the range from about 1 slm toabout 100 slm, preferably from about 5 slm to about 75 slm, and morepreferably from about 10 slm to about 50 slm, for example, about 25 slm.Carrier gases may include nitrogen (N₂), hydrogen (H₂), argon, heliumand combinations thereof. In some embodiment, an inert carrier gas ispreferred and includes nitrogen, argon, helium and combinations thereof.A carrier gas may be selected based upon specific precursor(s) and/ortemperature used during the epitaxial process 100. The same carrier gasis usually used throughout each of the steps 110-150. However, someembodiments may use a different carrier gas during the etching processas used in the deposition process. In one embodiment, the preferredetchant is chlorine gas, especially when the AGS process is conducted ata low temperature (e.g., <800° C.). For example, an etching gas containschlorine as an etchant and nitrogen as a carrier gas and is exposed tothe substrate surface at a temperature in a range from about 500° C. toabout 750° C. In another example, an etching gas containing chlorine andnitrogen is exposed to the substrate surface at a temperature in a rangefrom about 250° C. to about 500° C.

The etching process is terminated during step 150. In one example, theprocess chamber may be flushed with a purge gas or the carrier gasand/or the process chamber may be evacuated with a vacuum pump. Thepurging and/or evacuating processes remove excess etching gas, reactionby-products and other contaminates. In another example, once the etchingprocess has terminated, step 160 is immediately started without purgingand/or evacuating the process chamber.

The thicknesses of the epitaxial layer and the polycrystalline layer maybe determined during step 160. If the predetermined thicknesses areachieved, then epitaxial process 100 is terminated at step 170. However,if the predetermined thicknesses are not achieved, then steps 120-160are repeated as a cycle until the desired thicknesses are achieved. Theepitaxial layer is usually grown to have a thickness at a range fromabout 10 Å to about 2,000 Å, preferably from about 100 Å to about 1,500Å, and more preferably from about 400 Å to about 1,200 Å, for example,about 800 Å. The polycrystalline layer is usually deposited with athickness, if any, in a range from an atomic layer to about 500 Å. Thedesired or predetermined thickness of the epitaxial silicon-containinglayer or the polycrystalline silicon-containing layer is specific to aparticular fabrication process. In one example, the epitaxial layer mayreach the predetermined thickness while the polycrystalline layer is toothick. The excess polycrystalline layer may be further etched byrepeating steps 140-160 while skipping steps 120 and 130.

In one example, as depicted in FIGS. 2A-2E, a source/drain extension isformed within a MOSFET device wherein the silicon-containing layers areepitaxially and selectively deposited on the surface of the substrate.FIG. 2A depicts a source/drain region 232 formed by implanting ions intothe surface of a substrate 230. The segments of source/drain region 232are bridged by the gate 236 formed on gate oxide layer 235 and spacer234. In order to form a source/drain extension, a portion of thesource/drain region 232 is etched and wet-cleaned to produce a recess238, as in FIG. 2B. Etching of the gate 236 may be avoided by depositinga hardmask prior to etching the portion of source/drain region 232.

FIG. 2C illustrates one embodiment of an epitaxial process describedherein, in which a silicon-containing epitaxial layer 240 and optionalpolycrystalline layer 242 are simultaneously and selectively depositedwithout depositing on the spacer 234. Polycrystalline layer 242 isoptionally formed on gate 236 by adjusting the deposition and etchingprocesses in steps 120 and 140 of epitaxial process 100. Alternatively,polycrystalline layer 242 is continually etched away from gate 236 asepitaxial layer 240 is deposited on the source/drain region 232.

In another example, silicon-containing epitaxial layer 240 andpolycrystalline layer 242 are SiGe-containing layers with a germaniumconcentration in a range from about 1 at % to about 50 at %, preferablyabout 24 at % or less. Multiple SiGe-containing layers containingvarying amounts of silicon and germanium may be stacked to formsilicon-containing epitaxial layer 240 with a graded elementalconcentration. For example, a first SiGe-layer may be deposited with agermanium concentration in a range from about 15 at % to about 25 at %and a second SiGe-layer may be deposited with a germanium concentrationin a range from about 25 at % to about 35 at %.

In another example, silicon-containing epitaxial layer 240 andpolycrystalline layer 242 are SiC-containing layers with a carbonconcentration in a range from about 200 ppm to about 5 at %, preferablyabout 3 at % or less, preferably, from about 1 at % to about 2 at %, forexample, about 1.5 at %. In another embodiment, silicon-containingepitaxial layer 240 and polycrystalline layer 242 are SiGeC-containinglayers with a germanium concentration in the range from about 1 at % toabout 50 at %, preferably about 24 at % or less and a carbonconcentration at about 200 ppm to about 5 at %, preferably about 3 at %or less, more preferably from about 1 at % to about 2 at %, for example,about 1.5 at %.

Multiple layers containing Si, SiGe, SiC or SiGeC may be deposited invarying order to form graded elemental concentrations within thesilicon-containing epitaxial layer 240. The silicon-containing layersare generally doped with a dopant (e.g., boron, arsenic, phosphoric,gallium or aluminum) having a concentration in the range from about1×10¹⁹ atoms/cm³ to about 2.5×10²¹ atoms/cm³, preferably from about5×10¹⁹ atoms/cm³ to about 2×10²⁰ atoms/cm³. Dopants added to individuallayers of the silicon-containing material form graded dopants. Forexample, silicon-containing epitaxial layer 240 is formed by depositinga first SiGe-containing layer with a dopant concentration (e.g., boron)in a range from about 5×10¹⁹ atoms/cm³ to about 1×10²⁰ atoms/cm³ and asecond SiGe-containing layer with a dopant concentration (e.g., boron)in a range from about 1×10²⁰ atom s/cm³ to about 2×10²⁰ atoms/cm³.

Carbon incorporated in SiC-containing layers and SiGeC-containing layersis generally located in interstitial sites of the crystalline latticeimmediately following the deposition of the silicon-containing layer.The interstitial carbon content is about 10 at % or less, preferablyless than about 5 at % and more preferably from about 1 at % to about 3at %, for example, about 2 at %. The silicon-containing epitaxial layer240 may be annealed to incorporate at least a portion, if not all of theinterstitial carbon into substitutional sites of the crystallinelattice. The annealing process may include a spike anneal, such as rapidthermal process (RTP), laser annealing or thermal annealing with anatmosphere of gas, such as oxygen, nitrogen, hydrogen, argon, helium orcombinations thereof. The annealing process is conducted at atemperature from about 800° C. to about 1,200° C., preferably from about1,050° C. to about 1,100° C. The annealing process may occur immediatelyafter the silicon-containing layer is deposited or after a variety ofother process steps the substrate will endure.

During the next step, FIG. 2D shows a spacer 244, generally a nitridespacer (e.g., Si₃N₄) deposited on the spacer 234. Spacer 244 is usuallydeposited in a different chamber by a CVD or ALD technique. Therefore,the substrate is removed from the process chamber that was used todeposit silicon-containing epitaxial layer 240. During the transferbetween the two chambers, the substrate may be exposed to ambientconditions, such as the temperature, pressure or the atmospheric aircontaining water and oxygen. Upon depositing the spacer 244, orperforming other semiconductor process (e.g., anneal, deposition orimplant), the substrate may be exposed to ambient conditions a secondtime prior to depositing elevated layer 248. In one embodiment, anepitaxial layer (not shown) with no or minimal germanium (e.g., lessthan about 5 at %) is deposited on the top of epitaxial layer 240 beforeexposing the substrate to ambient conditions since native oxides areeasier to remove from epitaxial layers containing minimal germaniumconcentrations than from an epitaxial layer formed with a germaniumconcentration greater than about 5 at %.

FIG. 2E depicts another example in which an elevated layer 248 comprisedof a silicon-containing material is selectively and epitaxiallydeposited on epitaxial layer 240 (e.g., doped-SiGe). During thedeposition process, polycrystalline layer 242 is further grown,deposited or etched away on the gate 236.

In a preferred embodiment, elevated layer 248 is epitaxial depositedsilicon containing little or no germanium or carbon. However, in analternative embodiment, elevated layer 248 does contain germanium and/orcarbon. For example, elevated layer 248 may have about 5 at % or less ofgermanium. In another example, elevated layer 248 may have about 2 at %or less of carbon. Elevated layer 248 may also be doped with a dopant,such as boron, arsenic, phosphorus, aluminum or gallium.

Silicon-containing compounds are utilized within embodiments of theprocesses to deposit silicon-containing layers used for Bipolar devicefabrication (e.g., base, emitter, collector, emitter contact), BiCMOSdevice fabrication (e.g., base, emitter, collector, emitter contact) andCMOS device fabrication (e.g., channel, source/drain, source/drainextension, elevated source/drain, substrate, strained silicon, siliconon insulator and contact plug). Other embodiments of processes teach thegrowth of silicon-containing layers that can be used as gate, basecontact, collector contact, emitter contact, elevated source/drain andother uses.

The processes are extremely useful for depositing selective, epitaxialsilicon-containing layers in MOSFET and bipolar transistors as depictedin FIGS. 3A-3C. FIGS. 3A-3B show the epitaxially grownsilicon-containing compounds on a MOSFET device. The silicon-containingcompound is deposited on the source/drain features of the device. Thesilicon-containing compound adheres and grows from the crystal latticeof the underlying layer and maintains this arrangement as thesilicon-containing compound is grown to a desired thickness. FIG. 3Ademonstrates the silicon-containing compound deposited as a recessedsource/drain layer, while FIG. 3B shows silicon-containing compoundsdeposited as recessed source/drain layer and an elevated source/drainlayer.

The source/drain region 312 is formed by ion implantation. Generally,the substrate 310 is doped n-type while the source/drain region 312 isdoped p-type. Silicon-containing epitaxial layer 313 is selectivelygrown on the source/drain region 312 and/or directly on substrate 310.Silicon-containing epitaxial layer 314 is selectively grown on thesilicon-containing layer 313 according to aspects herein. A gate oxidelayer 318 bridges the segmented silicon-containing layer 313. Generally,gate oxide layer 318 is composed of silicon dioxide, silicon oxynitrideor hafnium oxide. Partially encompassing the gate oxide layer 318 is aspacer 316, which is usually an isolation material such as anitride/oxide stack (e.g., Si₃N₄/SiO₂/Si₃N₄). Gate layer 322 (e.g.,polysilicon) may have a protective layer 319, such as silicon dioxide,along the perpendicular sides, as in FIG. 3A. Alternately, gate layer322 may have a spacer 316 and off-set layers 320 (e.g., Si₃N₄) disposedon either side.

In another example, FIG. 3C depicts the deposited silicon-containingepitaxial layer 334 as a base layer of a bipolar transistor.Silicon-containing epitaxial layer 334 is selectively grown with thevarious embodiments of the invention. Silicon-containing epitaxial layer334 is deposited on an n-type collector layer 332 previously depositedon substrate 330. The transistor further includes isolation layer 333(e.g., SiO₂ or Si₃N₄), contact layer 336 (e.g., heavily doped poly-Si),off-set layer 338 (e.g., Si₃N₄), and a second isolation layer 340 (e.g.,SiO₂ or Si₃N₄).

In an alternative embodiment, FIG. 4 illustrates an epitaxial process400 that may be used to selectively deposit silicon-containingmaterials/layer. Epitaxial process 400 includes at least two depositionprocesses followed by an etching process. The first deposition processincludes a deposition gas containing a silicon source while the seconddeposition process includes a deposition gas containing a secondaryelemental source, such as germanium, carbon or a dopant (e.g., boron,arsenic, phosphorus, gallium or aluminum). Similar process parametersused in epitaxial process 100 are used in epitaxial process 400, such astemperatures, pressures, flow rates, carrier gases and precursors.

Epitaxial process 400 includes step 410 for loading a patternedsubstrate into the process chamber and adjusting the process chamber toa predetermined temperature. Step 420 provides a first depositionprocess to form an epitaxial layer on a monocrystalline surface whileforming a polycrystalline layer on secondary surfaces, such as amorphousand/or polycrystalline surfaces. The epitaxial layer and themonocrystalline layer are formed from a deposition gas containing asilicon source. During step 430, the first deposition process isterminated. Step 440 provides a second deposition process to continuegrowing the epitaxial layer on a monocrystalline surface and continueforming the polycrystalline layer on the secondary surface. Theepitaxial layer and the polycrystalline layer are further grown byexposing the substrate surface to a deposition gas containing asecondary elemental source. At step 450, the second deposition processis terminated. Step 460 provides an etching process to etch the exposedsilicon-containing layers. The etching process either minimizes orcompletely removes the polycrystalline layer while removing only amarginal portion of the epitaxial layer as a result of the rate at whicheach material is removed. During step 470, the etching process isterminated. The thicknesses of the epitaxial layer and thepolycrystalline layer, if any, are determined during step 480. If thepredetermined thickness is achieved, then epitaxial process 400 isterminated at step 490. However, if the predetermined thickness ofeither layer is not achieved, then steps 420-480 are repeated as a cycleuntil the predetermined thicknesses are achieved.

Epitaxial process 400 starts at step 410 by adjusting the processchamber containing the patterned substrate to a predeterminedtemperature. The temperature and pressure is tailored to the particularprocess conducted. Generally, the process chamber is maintained at aconsistent temperature throughout epitaxial process 400. However, somesteps may be performed at varying temperatures. The process chamber iskept at a temperature in the range from about 250° C. to about 1,000°C., preferably from about 500° C. to about 800° C. and more preferablyfrom about 550° C. to about 750° C. The appropriate temperature toconduct epitaxial process 400 may depend on the particular precursorsused to deposit and/or etch the silicon-containing materials duringsteps 420-480. In one embodiment, it has been found that chlorine (Cl₂)gas works exceptionally well as an etchant for silicon-containingmaterials at temperatures lower than processes using other more commonetchants. Therefore, in one embodiment a preferred temperature topre-heat the process chamber is about 750° C. or less, preferably about650° C. or less and more preferably about 550° C. or less. The processchamber is usually maintained with a pressure from about 0.1 Torr toabout 200 Torr, preferably from about 1 Torr to about 50 Torr. Thepressure may fluctuate during and between process steps 410-480, but isgenerally maintained constant.

The first deposition process is conducted during step 420. The patternedsubstrate is exposed to a first deposition gas to form an epitaxiallayer on the monocrystalline surface while forming a polycrystallinelayer on the secondary surfaces. The substrate is exposed to the firstdeposition gas for a period of time of about 0.5 seconds to about 30seconds, preferably from about 1 second to about 20 seconds, and morepreferably from about 5 seconds to about 10 seconds. The specificexposure time of the deposition process is determined in relation to theexposure time during the etching process in step 460, as well asparticular precursors and temperature used in the process. Generally,the substrate is exposed to the first deposition gas long enough to formthe maximized thickness of an epitaxial layer while forming theminimized thickness of a polycrystalline layer that may be easily etchedaway during subsequent step 460.

The first deposition gas contains at least a silicon source and acarrier gas. The first deposition gas may also contain a secondaryelemental source and/or a dopant compound, but preferably, the secondaryelemental source and the dopant compound are in the second depositiongas. Therefore, in one aspect, the first deposition gas may contain asilicon source, a secondary elemental source and a dopant source. Inanother aspect, the first deposition gas may contain a silicon sourceand a secondary elemental source. In yet another aspect, the firstdeposition gas may contain a silicon source and a dopant source. In analternative embodiment, the first deposition gas may also include atleast one etchant, such as hydrogen chloride or chlorine.

The silicon source is usually provided into the process chamber at arate in the range from about 5 sccm to about 500 sccm, preferably fromabout 10 sccm to about 300 sccm, and more preferably from about 50 sccmto about 200 sccm, for example, about 100 sccm. The preferred siliconsources include silane, dichlorosilane and disilane.

The silicon source is usually provided into the process chamber in acarrier gas. The carrier gas has a flow rate from about 1 slm to about100 slm, preferably from about 5 slm to about 75 slm, and morepreferably from about 10 slm to about 50 slm, for example, about 25 slm.Carrier gases may include nitrogen (N₂), hydrogen (H₂), argon, heliumand combinations thereof. In some embodiment, an inert carrier gas ispreferred and includes nitrogen, argon, helium and combinations thereof.Preferably, the carrier gas used throughout epitaxial process 400 isnitrogen, for reasons discussed above.

During step 430, the first deposition process is terminated. In oneexample, the process chamber may be flushed with a purge gas or thecarrier gas and/or the process chamber may be evacuated with a vacuumpump. The purging and/or evacuating processes remove excess depositiongas, reaction by-products and other contaminates. In another example,once the first deposition process has terminated, the second depositionprocess in step 440 is immediately started without purging and/orevacuation the process chamber.

The deposition gas used during step 440 contains a carrier gas and atleast one secondary elemental source, such as a germanium source, acarbon source and/or a dopant compound. Alternatively, a silicon sourcemay be included in the second deposition gas. The secondary elementalsource is added to the process chamber with the carrier gas to continuethe growth of the silicon-containing compounds deposited during step420. The silicon-containing compounds may have varied compositionscontrolled by the specific secondary elemental source and theconcentration of the secondary elemental source. A secondary elementalsource is usually provided into the process chamber at a rate in therange from about 0.1 sccm to about 20 sccm, preferably from about 0.5sccm to about 10 sccm, and more preferably from about 1 sccm to about 5sccm, for example, about 2 sccm. Germanium sources, carbon sources anddopant compounds are selected from the aforementioned precursorsdiscussed above.

During step 450, the second deposition process is terminated. In oneexample, the process chamber may be flushed with a purge gas or thecarrier gas and/or the process chamber may be evacuated with a vacuumpump. The purging and/or evacuating processes remove excess depositiongas, reaction by-products and other contaminates. In another example,once the second deposition process has terminated, the etching processin step 460 is immediately started without purging and/or evacuation theprocess chamber.

The etching process in step 460 removes materials deposited during steps420 and 440 from the substrate surface. The etching process removes bothepitaxial or monocrystalline materials and amorphous and/orpolycrystalline materials. Polycrystalline layers, if any, deposited onthe substrate surface is removed at a faster rate than the epitaxiallayers. The time duration of the etching process is balanced with thetime duration of the two deposition processes. Therefore, the net resultof the deposition processes in steps 420 and 440 and etching process instep 460 is to form selective and epitaxially grown silicon-containingmaterial while minimizing, if any, growth of polycrystallinesilicon-containing material.

During step 460, the substrate is exposed to the etching gas for aperiod of time in a range from about 10 seconds to about 90 seconds,preferably, from about 20 seconds to about 60 seconds, and morepreferably from about 30 seconds to about 45 seconds. The etching gasincludes at least one etchant and a carrier gas. The etchant is usuallyprovided into the process chamber at a rate in a range from about 10sccm to about 700 sccm, preferably from about 50 sccm to about 500 sccm,and more preferably from about 100 sccm to about 400 sccm, for example,about 200 sccm. The etchant used in the etching gas may include chlorine(Cl₂), hydrogen chloride (HCl), boron trichloride (BCl₃), carbontetrachloride (CCl₄), chlorotrifluoride (ClF₃) and combinations thereof.Preferably, chlorine or hydrogen chloride is used as the etchant.

The etchant is usually provided into the process chamber along with acarrier gas. The carrier gas has a flow rate in a range from about 1 slmto about 100 slm, preferably from about 5 slm to about 75 slm, and morepreferably from about 10 slm to about 50 slm, for example, about 25 slm.Carrier gases may include nitrogen (N₂), hydrogen (H₂), argon, heliumand combinations thereof. In some embodiment, an inert carrier gas ispreferred and includes nitrogen, argon, helium and combinations thereof.A carrier gas may be selected based upon specific precursor(s) and/ortemperature used during the epitaxial process 400. The same carrier gasis usually used throughout each of steps 420-480. However, someembodiments may use a different carrier gas during the etching processas used in the deposition process. In one embodiment, the preferredetchant is chlorine gas, especially when the AGS process is conducted ata low temperature (e.g., <800° C.). For example, an etching gas containschlorine as an etchant and nitrogen as a carrier gas and is exposed tothe substrate surface at a temperature in a range from about 500° C. toabout 750° C.

The etching process is terminated during step 470. In one example, theprocess chamber may be flushed with a purge gas or the carrier gasand/or the process chamber may be evacuated with a vacuum pump. Thepurging and/or evacuating processes remove excess etching gas, reactionby-products and other contaminates. In another example, once the etchingprocess has terminated, step 480 is immediately started without purgingand/or evacuating the process chamber.

The thicknesses of epitaxial layer and the polycrystalline layer may bedetermined during step 480. If the predetermined thicknesses areachieved, then epitaxial process 400 is ended at step 490. However, ifthe predetermined thicknesses are not achieved, then steps 420-180 arerepeated as a cycle until the desired thicknesses are achieved. Theepitaxial layer is usually grown to have a thickness at a range fromabout 10 Å to about 2,000 Å, preferably from about 100 Å to about 1,500Å, and more preferably from about 400 Å to about 1,200 Å, for example,about 800 Å. The polycrystalline layer is usually deposited on have athickness, if any, at a range from about an atomic layer to about 500 Å.The desired or predetermined thickness of the epitaxialsilicon-containing layer or the polycrystalline silicon-containing layeris specific to a particular fabrication process. In one example, theepitaxial layer may reach the predetermined thickness while thepolycrystalline layer is too thick. The excess polycrystalline layer maybe further etched by repeating steps 140-160 while omitting steps 460and 470. Likewise, in other examples, steps 420, 440 and 460 may beindividually omitted while proceeding through epitaxial process 400. Byskipping steps 420, 440 and 460, the elemental concentration and thethicknesses of deposited silicon-containing materials may be controlled.

Embodiments of the invention teach processes to depositsilicon-containing compounds on a variety of substrates. Substrates onwhich embodiments of the invention may be useful include, but are notlimited to semiconductor wafers, such as crystalline silicon (e.g.,Si<100> and Si<111>), silicon oxide, silicon germanium, doped or undopedwafers and patterned or non-patterned wafers. Substrates have a varietyof geometries (e.g., round, square and rectangular) and sizes (e.g., 200mm OD, 300 mm OD).

In one embodiment, silicon-containing compounds deposited by processdescribed herein include a germanium concentration within the range fromabout 0 at % to about 95 at %. In another embodiment, a germaniumconcentration is within the range from about 1 at % to about 30 at %,preferably from about 15 at % to about 30 at %, for example, about 20 at%. Silicon-containing compounds also include a carbon concentrationwithin the range from about 0 at % to about 5 at %. In other aspects, acarbon concentration is within the range from about 200 ppm to about 3at %, preferably about 1.5 at %.

The silicon-containing compound films of germanium and/or carbon areproduced by various processes of the invention and can have consistent,sporadic or graded elemental concentrations. Graded silicon germaniumfilms are disclosed in U.S. Pat. No. 6,770,134 and U.S. patentapplication Ser. No. 10/014,466, published as United States PatentPublication 20020174827, both assigned to Applied Materials, Inc., andare incorporated herein by reference in entirety for the purpose ofdescribing methods of depositing graded silicon-containing compoundfilms. In one example, a silicon source (e.g., SiH₄) and a germaniumsource (e.g., GeH₄) are used to selectively and epitaxially depositsilicon germanium containing films. In this example, the ratio ofsilicon source and germanium source can be varied in order to providecontrol of the elemental concentrations, such as silicon and germanium,while growing graded films. In another example, a silicon source and acarbon source (e.g., CH₃SiH₃) are used to selectively and epitaxiallydeposit silicon carbon containing films. The ratio of silicon source andcarbon source can be varied in order to provide control of the elementalconcentration while growing homogenous or graded films. In anotherexample, a silicon source, a germanium source and a carbon source areused to selectively and epitaxially deposit silicon germanium carboncontaining films. The ratios of silicon, germanium and carbon sourcesare independently varied in order to provide control of the elementalconcentration while growing homogenous or graded films.

MOSFET devices formed by processes described herein may contain a PMOScomponent or a NMOS component. The PMOS component, with a p-typechannel, has holes that are responsible for channel conduction, whilethe NMOS component, with a n-type channel, has electrons that areresponsible channel conduction. Therefore, for example, asilicon-containing material such as SiGe may be deposited in a recessedarea to form a PMOS component. In another example, a silicon-containingfilm such as SiC may be deposited in a recessed area to form a NMOScomponent. SiGe is used for PMOS application for several reasons. A SiGematerial incorporates more boron than silicon alone, thus the junctionresistivity may be lowered. Also, the SiGe/silicide layer interface atthe substrate surface has a lower Schottky barrier than the Si/silicideinterface.

Further, SiGe grown epitaxially on the top of silicon has compressivestress inside the film because the lattice constant of SiGe is largerthan that of silicon. The compressive stress is transferred in thelateral dimension to create compressive strain in the PMOS channel andto increase mobility of the holes. For NMOS application, SiC can be usedin the recessed areas to create tensile stress in the channel, since thelattice constant of SiC is smaller than that of silicon. The tensilestress is transferred into the channel and increases the electronmobility. Therefore, in one embodiment, a first silicon-containing layeris formed with a first lattice strain value and a secondsilicon-containing layer is formed with a second lattice strain value.For example, a SiC layer with a thickness from about 50 Å to about 200 Åis deposited on the substrate surface and sequentially, a SiGe layerwith a thickness from about 150 Å to about 1,000 Å is deposited on theSiC layer. The SiC layer may be epitaxially grown and has less strainthan the SiGe layer epitaxially grown on the SiC layer.

In embodiments described herein, silicon-containing compound films areselectively and epitaxially deposited by chemical vapor deposition (CVD)processes. Chemical vapor deposition processes include atomic layerdeposition (ALD) processes and/or atomic layer epitaxy (ALE) processes.Chemical vapor deposition includes the use of many techniques, such asplasma-assisted CVD (PA-CVD), atomic layer CVD (ALCVD), organometallicor metalorganic CVD (OMCVD or MOCVD), laser-assisted CVD (LA-CVD),ultraviolet CVD (UV-CVD), hot-wire (HWCVD), reduced-pressure CVD(RP-CVD), ultra-high vacuum CVD (UHV-CVD) and others. In one embodiment,the preferred process is to use thermal CVD to epitaxially grow ordeposit the silicon-containing compound, whereas the silicon-containingcompound includes silicon, SiGe, SiC, SiGeC, doped variants thereof andcombinations thereof.

The processes of the invention can be carried out in equipment known inthe art of ALE, CVD and ALD. The apparatus may contain multiple gaslines to maintain the deposition gas and the etching gas separated priorto entering the process chamber. Thereafter, the gases are brought intocontact with a heated substrate on which the silicon-containing compoundfilms are grown. Hardware that can be used to deposit silicon-containingfilms includes the Epi Centura® system and the Poly Gen® systemavailable from Applied Materials, Inc., located in Santa Clara, Calif.An ALD apparatus is disclosed in U.S. patent Ser. No. 10/032,284, filedDec. 21, 2001, published as United States Patent Publication No.20030079686, assigned to Applied Materials, Inc., and entitled, “GasDelivery Apparatus and Methods for ALD,” and is incorporated herein byreference in entirety for the purpose of describing the apparatus. Otherapparatuses include batch, high-temperature furnaces, as known in theart.

EXAMPLES

The following hypothetical examples were conducted to form an elevatedsource drain (ESD) structure on a substrate surface. The patternedsubstrates contained monocrystalline surfaces with source/drain featuresformed within the substrate surface and gate and spacers formedtherebetween.

Example 1 Selective Epitaxy of Silicon with Cl₂ Etchant

The substrate was placed into a process chamber heated and maintained at550° C. The process chamber was maintained at a pressure of about 15Torr. The substrate surface was exposed to a flow of deposition gascontaining silane with a flow rate of 100 sccm and nitrogen with a flowrate of 25 slm for 7 seconds. The substrate was thereafter exposed to anetching gas containing chlorine gas with a flow rate of 20 sccm andnitrogen with a flow rate of 25 slm for 10 seconds. A cycle ofdeposition gas exposure and etching gas exposure was repeated 50 timesto form an epitaxially grown silicon layer on the exposedmonocrystalline portion of the substrate. The silicon epitaxial layerhad a thickness of about 1,000 Å.

Example 2 Selective Epitaxy of Silicon Germanium with Cl₂ Etchant

The substrate was placed into a process chamber heated and maintained at550° C. The process chamber was maintained at a pressure of about 15Torr. The substrate surface was exposed to a flow of deposition gascontaining silane with a flow rate of 100 sccm, germane with a flow rateof 3 sccm and nitrogen with a flow rate of 25 slm for 8 seconds. Thesubstrate was thereafter exposed to an etching gas containing chlorinegas with a flow rate of 20 sccm and nitrogen with a flow rate of 25 slmfor 10 seconds. A cycle of deposition gas exposure and etching gasexposure was repeated 50 times to form an epitaxially grownsilicon-containing layer on the exposed monocrystalline portion of thesubstrate. The silicon-containing epitaxial layer had a thickness ofabout 1,700 Å.

Example 3 Selective Epitaxy of Silicon Germanium with Cl₂ Etchant

The substrate was placed into a process chamber heated and maintained at550° C. The process chamber was maintained at a pressure of about 15Torr. The substrate surface was exposed to a flow of deposition gascontaining silane with a flow rate of 100 sccm and nitrogen with a flowrate of 25 slm for 7 seconds. The substrate surface was thereafterexposed to a flow of second deposition gas containing germane with aflow rate of 5 sccm and nitrogen with a flow rate of 25 slm for 7seconds. The substrate was exposed to an etching gas containing chlorinegas with a flow rate of 20 sccm and nitrogen with a flow rate of 25 slmfor 10 seconds. A cycle of deposition gas exposure and etching gasexposure was repeated 50 times to form an epitaxially grownsilicon-containing layer on the exposed monocrystalline portion of thesubstrate. The silicon-containing epitaxial layer had a thickness ofabout 1,800 Å.

Example 4 Selective Epitaxy of Silicon Carbon with Cl₂ Etchant

The substrate was placed into a process chamber heated and maintained at550° C. The process chamber was maintained at a pressure of about 15Torr. The substrate surface was thereafter exposed to a flow ofdeposition gas containing silane with a flow rate of 100 sccm,methylsilane with a flow rate of 1 sccm and nitrogen with a flow rate of25 slm for 8 seconds. The substrate was exposed to an etching gascontaining chlorine gas with a flow rate of 20 sccm and nitrogen with aflow rate of 25 slm for 10 seconds. A cycle of deposition gas exposureand etching gas exposure was repeated 50 times to form an epitaxiallygrown silicon-containing layer on the exposed monocrystalline portion ofthe substrate. The silicon-containing epitaxial layer had a thickness ofabout 1,600 Å.

Example 5 Selective Epitaxy of Silicon Carbon with Cl₂ Etchant

The substrate was placed into a process chamber heated and maintained at550° C. The process chamber was maintained at a pressure of about 15Torr. The substrate surface was thereafter exposed to a flow ofdeposition gas containing silane with a flow rate of 100 sccm andnitrogen with a flow rate of 25 slm for 7 seconds. The substrate surfacewas exposed to a flow of second deposition gas containing methylsilanewith a flow rate of 5 sccm and nitrogen with a flow rate of 25 slm for 7seconds. The substrate was exposed to an etching gas containing chlorinegas with a flow rate of 20 sccm and nitrogen with a flow rate of 25 slmfor 10 seconds. A cycle of deposition gas exposure and etching gasexposure was repeated 50 times to form an epitaxially grownsilicon-containing layer on the exposed monocrystalline portion of thesubstrate. The silicon-containing epitaxial layer had a thickness ofabout 1,800 Å.

Example 6 Selective Epitaxy of Silicon with HCl Etchant

The substrate was placed into a process chamber heated and maintained at700° C. The process chamber was maintained at a pressure of about 15Torr. The substrate surface was thereafter exposed to a flow ofdeposition gas containing silane with a flow rate of 100 sccm andhydrogen with a flow rate of 25 slm for 7 seconds. The substrate wasexposed to an etching gas containing hydrogen chloride with a flow rateof 200 sccm and hydrogen with a flow rate of 25 slm for 40 seconds. Acycle of deposition gas exposure and etching gas exposure was repeated10 times to form an epitaxially grown silicon layer on the exposedmonocrystalline portion of the substrate. The silicon epitaxial layerhad a thickness of about 800 Å.

Example 7 Selective Epitaxy of Silicon Germanium with HCl Etchant

The substrate was placed into a process chamber heated and maintained at700° C. The process chamber was maintained at a pressure of about 15Torr. The substrate surface was thereafter exposed to a flow ofdeposition gas containing silane with a flow rate of 100 sccm, germanewith a flow rate of 3 sccm and hydrogen with a flow rate of 25 slm for 8seconds. The substrate was exposed to an etching gas containing hydrogenchloride with a flow rate of 200 sccm and hydrogen with a flow rate of25 slm for 40 seconds. A cycle of deposition gas exposure and etchinggas exposure was repeated 20 times to form an epitaxially grownsilicon-containing layer on the exposed monocrystalline portion of thesubstrate. The silicon-containing epitaxial layer had a thickness ofabout 1,500 Å.

Example 8 Selective Epitaxy of Silicon Germanium with HCl Etchant

The substrate was placed into a process chamber heated and maintained at700° C. The process chamber was maintained at a pressure of about 15Torr. The substrate surface was thereafter exposed to a flow ofdeposition gas containing silane with a flow rate of 100 sccm andhydrogen with a flow rate of 25 slm for 7 seconds. The substrate surfacewas exposed to a flow of second deposition gas containing germane with aflow rate of 5 sccm and hydrogen with a flow rate of 25 slm for 7seconds. The substrate was exposed to an etching gas containing hydrogenchloride with a flow rate of 200 sccm and hydrogen with a flow rate of25 slm for 40 seconds. A cycle of deposition gas exposure and etchinggas exposure was repeated 20 times to form an epitaxially grownsilicon-containing layer on the exposed monocrystalline portion of thesubstrate. The silicon-containing epitaxial layer had a thickness ofabout 1,600 Å.

Example 9 Selective Epitaxy of Silicon Carbon with HCl Etchant

The substrate was placed into a process chamber heated and maintained at700° C. The process chamber was maintained at a pressure of about 15Torr. The substrate surface was thereafter exposed to a flow ofdeposition gas containing silane with a flow rate of 100 sccm,methylsilane with a flow rate of 1 sccm and hydrogen with a flow rate of25 slm for 8 seconds. The substrate was exposed to an etching gascontaining hydrogen chloride with a flow rate of 200 sccm and hydrogenwith a flow rate of 25 slm for 40 seconds. A cycle of deposition gasexposure and etching gas exposure was repeated 20 times to form anepitaxially grown silicon-containing layer on the exposedmonocrystalline portion of the substrate. The silicon-containingepitaxial layer had a thickness of about 1,500 Å.

Example 10 Selective Epitaxy of Silicon Carbon with HCl Etchant

The substrate was placed into a process chamber heated and maintained at700° C. The process chamber was maintained at a pressure of about 15Torr. The substrate surface was thereafter exposed to a flow ofdeposition gas containing silane with a flow rate of 100 sccm andhydrogen with a flow rate of 25 slm for 7 seconds. The substrate surfacewas exposed to a flow of second deposition gas containing germane with aflow rate of 5 sccm and hydrogen with a flow rate of 25 slm for 7seconds. The substrate was exposed to an etching gas containing hydrogenchloride with a flow rate of 200 sccm and hydrogen with a flow rate of25 slm for 40 seconds. A cycle of deposition gas exposure and etchinggas exposure was repeated 20 times to form an epitaxially grownsilicon-containing layer on the exposed monocrystalline portion of thesubstrate. The silicon-containing epitaxial layer had a thickness ofabout 1,600 Å. The exposed dielectric portions of the substrate surface,such as the gate, formed either limited or no polycrystalline growthfrom the deposition gas.

Example 11 Selective Epitaxy of Silicon Doped with B and Etched with Cl₂

The substrate was placed into a process chamber heated and maintained at550° C. The process chamber was maintained at a pressure of about 15Torr. The substrate surface was exposed to a flow of deposition gascontaining silane with a flow rate of 100 sccm, diborane with a flowrate of 3 sccm and nitrogen with a flow rate of 25 slm for 7 seconds.The substrate was thereafter exposed to an etching gas containingchlorine gas with a flow rate of 20 sccm and nitrogen with a flow rateof 25 slm for 10 seconds. A cycle of deposition gas exposure and etchinggas exposure was repeated 50 times to form an epitaxially grown siliconlayer on the exposed monocrystalline portion of the substrate. Thesilicon epitaxial layer had a thickness of about 1,000 Å.

Example 12 Selective Epitaxy of Silicon Germanium Doped with B andEtched with Cl₂

The substrate was placed into a process chamber heated and maintained at550° C. The process chamber was maintained at a pressure of about 15Torr. The substrate surface was exposed to a flow of deposition gascontaining silane with a flow rate of 100 sccm, germane with a flow rateof 3 sccm, diborane with a flow rate of 3 sccm and nitrogen with a flowrate of 25 slm for 8 seconds. The substrate was thereafter exposed to anetching gas containing chlorine gas with a flow rate of 20 sccm andnitrogen with a flow rate of 25 slm for 10 seconds. A cycle ofdeposition gas exposure and etching gas exposure was repeated 50 timesto form an epitaxially grown silicon-containing layer on the exposedmonocrystalline portion of the substrate. The silicon-containingepitaxial layer had a thickness of about 1,700 Å.

Example 13 Selective Epitaxy of Silicon Germanium Doped with B andEtched with Cl₂

The substrate was placed into a process chamber heated and maintained at550° C. The process chamber was maintained at a pressure of about 15Torr. The substrate surface was exposed to a flow of deposition gascontaining silane with a flow rate of 100 sccm, diborane with a flowrate of 3 sccm and nitrogen with a flow rate of 25 slm for 7 seconds.The substrate surface was thereafter exposed to a flow of seconddeposition gas containing germane with a flow rate of 5 sccm andnitrogen with a flow rate of 25 slm for 7 seconds. The substrate wasthereafter exposed to an etching gas containing chlorine gas with a flowrate of 20 sccm and nitrogen with a flow rate of 25 slm for 10 seconds.A cycle of deposition gas exposure and etching gas exposure was repeated50 times to form an epitaxially grown silicon-containing layer on theexposed monocrystalline portion of the substrate. The silicon-containingepitaxial layer had a thickness of about 1,800 Å.

Example 14 Selective Epitaxy of Silicon Carbon Doped with P and Etchedwith Cl₂

The substrate was placed into a process chamber heated and maintained at550° C. The process chamber was maintained at a pressure of about 15Torr. The substrate surface was exposed to a flow of deposition gascontaining silane with a flow rate of 100 sccm, methylsilane with a flowrate of 1 sccm, phosphine with a flow rate of 3 sccm and nitrogen with aflow rate of 25 slm for 8 seconds. The substrate was thereafter exposedto an etching gas containing chlorine gas with a flow rate of 20 sccmand nitrogen with a flow rate of 25 slm for 10 seconds. A cycle ofdeposition gas exposure and etching gas exposure was repeated 80 timesto form an epitaxially grown silicon-containing layer on the exposedmonocrystalline portion of the substrate. The silicon-containingepitaxial layer had a thickness of about 1,600 Å.

Example 15 Selective Epitaxy of Silicon Carbon Doped with P and Etchedwith Cl₂

The substrate was placed into a process chamber heated and maintained at550° C. The process chamber was maintained at a pressure of about 15Torr. The substrate surface was exposed to a flow of deposition gascontaining silane with a flow rate of 100 sccm, phosphine with a flowrate of 3 sccm and nitrogen with a flow rate of 25 slm for 7 seconds.The substrate surface was thereafter exposed to a flow of seconddeposition gas containing methylsilane with a flow rate of 5 sccm andnitrogen with a flow rate of 25 slm for 7 seconds. The substrate wasthereafter exposed to an etching gas containing chlorine gas with a flowrate of 20 sccm and nitrogen with a flow rate of 25 slm for 10 seconds.A cycle of deposition gas exposure and etching gas exposure was repeated80 times to form an epitaxially grown silicon-containing layer on theexposed monocrystalline portion of the substrate. The silicon-containingepitaxial layer had a thickness of about 1,800 Å.

While the foregoing is directed to embodiments of the present invention,other and further embodiments of the invention may be devised withoutdeparting from the basic scope thereof, and the scope thereof isdetermined by the claims that follow.

1. A method of epitaxially forming a silicon-containing material on asubstrate surface, comprising: positioning into a process chamber asubstrate comprising a monocrystalline surface and at least a secondsurface selected from the group consisting of an amorphous surface, apolycrystalline surface, and combinations thereof; exposing thesubstrate to a deposition gas comprising a silicon source and a secondelemental source selected from the group consisting of a germaniumsource, a carbon source, and combinations thereof to deposit anepitaxial layer on the monocrystalline surface and a polycrystallinelayer on the second surface; and subsequently exposing the substrate toan etching gas comprising at least a chlorine containing compound toetch the polycrystalline layer at a faster rate than the epitaxiallayer, wherein the epitaxial layer has a graded concentration of asecond element deposited, at least in part, by the second elementalsource.
 2. The method of claim 1, wherein the second element is carbon.3. The method of claim 2, wherein there is a higher concentration ofcarbon in a lower portion of the epitaxial layer than in an upperportion of the epitaxial layer.
 4. The method of claim 2, furthercomprising annealing the epitaxial layer.
 5. The method of claim 2,wherein the deposition gas further comprises a boron dopant source. 6.The method of claim 1, wherein the second element is germanium.
 7. Themethod of claim 6, wherein there is a higher concentration of germaniumin a lower portion of the epitaxial layer than in an upper portion ofthe epitaxial layer.
 8. The method of claim 1, wherein the siliconsource and the second elemental source comprise at least anorganosilane.
 9. The method of claim 1, wherein the deposition gasfurther comprises a third elemental source to deposit a third element.10. The method of claim 9, wherein the second elemental source and thethird elemental source comprise at least an organogermane.
 11. Themethod of claim 9, wherein the epitaxial layer has a gradedconcentration of the third element.
 12. The method of claim 9, whereinthe second element is carbon and the third element is germanium.
 13. Themethod of claim 9, wherein the second element is germanium and the thirdelement is carbon.
 14. A method of epitaxially forming asilicon-containing material on a substrate surface, comprising:positioning into a process chamber a substrate comprising amonocrystalline surface and at least a second surface selected from thegroup consisting of an amorphous surface, a polycrystalline surface, andcombinations thereof; exposing the substrate to a deposition gascomprising a silicon source and a second elemental source selected fromthe group consisting of a germanium source, a carbon source, andcombinations thereof to deposit an epitaxial layer on themonocrystalline surface and a polycrystalline layer on the secondsurface; and subsequently exposing the substrate to an etching gascomprising at least a chlorine containing compound to etch thepolycrystalline layer at a faster rate than the epitaxial layer; andcombining the epitaxial layer with one or more additional epitaxiallayers to form a combined epitaxial layer with a graded concentration ofa second element deposited, at least in part, by the second elementalsource.
 15. The method of claim 14, wherein the second element iscarbon.
 16. The method of claim 15, wherein there is a higherconcentration of carbon in a lower portion of the combined epitaxiallayer than in an upper portion of the combined epitaxial layer.
 17. Themethod of claim 15, further comprising annealing the combined epitaxiallayer.
 18. The method of claim 15, wherein the deposition gas furthercomprises a boron dopant source.
 19. The method of claim 14, wherein thesecond element is germanium.
 20. The method of claim 19, wherein thereis a higher concentration of germanium in a lower portion of thecombined epitaxial layer than in an upper portion of the combinedepitaxial layer.
 21. The method of claim 14, wherein the silicon sourceand the second elemental source comprise at least an organosilane. 22.The method of claim 14, wherein the deposition gas further comprises athird elemental source to deposit a third element.
 23. The method ofclaim 22, wherein the second elemental source and the third elementalsource comprise at least an organogermane.
 24. The method of claim 22,wherein the combined epitaxial layer has a graded concentration of thethird element.
 25. The method of claim 22, wherein the second element iscarbon and the third element is germanium.
 26. The method of claim 22,wherein the second element is germanium and the third element is carbon.